Computer 222 - Computer Organization » Fall 2021 » Quiz 1

Need help with your exam preparation?

Question #1
16-bit CPU’s can directly address how much memory:
A.   16 KB
B.   4 GiB
C.   64 GB
D.   64 KiB
Question #2
32-bit CPU’s can directly address how much memory:
A.   3200 KB
B.   4 GiB
C.   2 MB
D.   1 GB
Question #3
210 exactly = in hexadecimal:
A.   0x1000
B.   0x0210
C.   0x0400
D.   0x100
Question #4
“Hell” is stored in memory in Little Endian (MIPS default) as:
A.   0xff6c496c
B.   0x6c6c6a4a
C.   lleH (ASCII)
D.   Hell (ASCII)
Question #5
Static data is stored in which memory segment:
A.   heap
B.   text
C.   data
D.   stack
Question #6
Dynamic data is stored in which memory segment:
A.   text
B.   heap
C.   stack
D.   data
Question #7
I/O is addressed in which memory segment:
A.   stack
B.   MMIO
C.   IO
D.   heap
Question #8
In a General Register CPU, R-format instructions address how many registers:
A.   1
B.   0
C.   2
D.   3
Question #9
In any CPU, which register holds a pointer to the top of the stack:
A.   SP
B.   FP
C.   PC
D.   GP
Question #10
At the Macro architecture level, we address all of which units:
A.   GPU's
B.   CPU cores
C.   Cores and caches
D.   MLM
Question #11
At the Micro architecture level, we address which functions:
A.   Cores
B.   Branch prediction
C.   ICU
D.   Pipelines
Question #12
Which is NOT a defined level of Computer Architecture in the stack model:
A.   ISA
B.   Shared L2 cache
C.   Macro-architecture
D.   Micro-architecture
Question #13
A MIPS CPU architecture provides for a main integer processor, plus:
A.   Up to 4 Program Counters
B.   Dedicated registers
C.   Up to 4 GPU’s
D.   Up to 4 co-processors, including an FPU
Question #14
The C, V, N, Z flags are all always updated by which one of these instructions:
A.   ori
B.   add
C.   ror
D.   and
Question #15
The “Program Counter” is stored in which Registers in MIPS, ARMv5:
A.   $0, R15
B.   $sp, R0
C.   $15, R14
D.   PC, R15

Need help with your exam preparation?