Computer 222 - Computer Organization » Fall 2021 » Quiz 1

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Question #1
16-bit CPU’s can directly address how much memory:
A.   64 KiB
B.   4 GiB
C.   16 KB
D.   64 GB
Question #2
32-bit CPU’s can directly address how much memory:
A.   3200 KB
B.   1 GB
C.   2 MB
D.   4 GiB
Question #3
210 exactly = in hexadecimal:
A.   0x0210
B.   0x0400
C.   0x100
D.   0x1000
Question #4
“Hell” is stored in memory in Little Endian (MIPS default) as:
A.   lleH (ASCII)
B.   Hell (ASCII)
C.   0x6c6c6a4a
D.   0xff6c496c
Question #5
Static data is stored in which memory segment:
A.   stack
B.   heap
C.   data
D.   text
Question #6
Dynamic data is stored in which memory segment:
A.   text
B.   heap
C.   stack
D.   data
Question #7
I/O is addressed in which memory segment:
A.   heap
B.   stack
C.   MMIO
D.   IO
Question #8
In a General Register CPU, R-format instructions address how many registers:
A.   1
B.   0
C.   2
D.   3
Question #9
In any CPU, which register holds a pointer to the top of the stack:
A.   FP
B.   GP
C.   SP
D.   PC
Question #10
At the Macro architecture level, we address all of which units:
A.   Cores and caches
B.   GPU's
C.   CPU cores
D.   MLM
Question #11
At the Micro architecture level, we address which functions:
A.   ICU
B.   Branch prediction
C.   Cores
D.   Pipelines
Question #12
Which is NOT a defined level of Computer Architecture in the stack model:
A.   Micro-architecture
B.   Shared L2 cache
C.   ISA
D.   Macro-architecture
Question #13
A MIPS CPU architecture provides for a main integer processor, plus:
A.   Up to 4 co-processors, including an FPU
B.   Up to 4 Program Counters
C.   Dedicated registers
D.   Up to 4 GPU’s
Question #14
The C, V, N, Z flags are all always updated by which one of these instructions:
A.   ror
B.   add
C.   ori
D.   and
Question #15
The “Program Counter” is stored in which Registers in MIPS, ARMv5:
A.   PC, R15
B.   $15, R14
C.   $sp, R0
D.   $0, R15

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