Computer 222 - Computer Organization » Fall 2021 » Quiz 5 Memory

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Question #1
Multi-level memory hierarchy from fastest to slowest:
A.   Disk -> main ->L2 cache
B.   Main -> L2 cache
C.   Registers -> L1 cache -> L2 cache
D.   L1 cache -> main -> L2 cache
Question #2
L1 cache is refilled directly, first from:
A.   L3 cache
B.   Main memory
C.   L2 cache
D.   Any of these
Question #3
RISC CPU’s L1 cache architecture is:
A.   Separate I and D caches (Harvard)
B.   Any of these
C.   Unified caches (von Neumann)
D.   Shared cache
Question #4
RISC CPU’s L2 cache architecture is:
A.   Unified caches (von Neumann)
B.   Shared cache
C.   Separate I and D caches (Harvard)
D.   Any of these
Question #5
RISC CPU’s L3 cache architecture is:
A.   Shared unified cache
B.   Separate I and D caches (Harvard)
C.   Unified caches (von Neumann)
D.   Any of these
Question #6
Each level of cache memory is approx. N times larger/smaller and faster/slower where N=:
A.   10
B.   3
C.   4
D.   2
Question #7
Cache memory is made from what type of memory:
A.   EEPROM
B.   ROM
C.   SRAM
D.   DRAM
Question #8
Cache memory in most RISC CPU’s like MIPS use what type of mapping:
A.   set associative
B.   associative
C.   set direct
D.   direct
Question #9
Cache is refilled in one chunk at a time, called a:
A.   sector
B.   word
C.   page
D.   block
Question #10
D-Cache misses in RISC can only be caused by which type of instruction:
A.   Jump
B.   Load or Store
C.   Input
D.   Branch
Question #11
D-Cache organization that has the simplest hardware implementation:
A.   Set associative, Write-through
B.   Direct-mapped, Write-back
C.   Fully associative, Write-back
D.   Direct-mapped, Write-through
Question #12
I-Cache misses in RISC are most likely to be caused by which type of instruction:
A.   Branch
B.   Jump
C.   Input
D.   Load or Store
Question #13
Virtual memory is most likely to be needed in which class of computer system:
A.   Real-time Embedded
B.   Embedded
C.   Gaming
D.   Desktop computer or Server
Question #14
Virtual memory is uses all these forms of addresses, except which one:
A.   Physical
B.   Virtual
C.   Logical
D.   Segmented/Paged
Question #15
Virtual memory uses a Page Table with an on-chip cache called a:
A.   TLB
B.   MMU
C.   D-cache
D.   Direct Page Table

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